1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and method for fabricating the same which improves reliability of the semiconductor device.
2. Background of the Related Art
Generally, with high packing density of a semiconductor device, the size of a gate electrode is gradually reduced in the semiconductor device. Accordingly, specific resistance of the gate electrode increases, thereby reducing operation speed of the device.
In this respect, a manufacture of a gate electrode having low resistivity is essentially required. To this end, a refractory metal silicon of low resistance is used as the gate electrode and it is called a policide(silicide on doped polycrystalline-Si).
A tungsten silicide WSi2 having a resistivity value of 60xcx9c200 xcexcxcexa9 cm has been widely used, but cobalt silicide (CoSi2) having a resistivity of 15xcx9c20xcexcxcexa9 cm has recently received much attention, with high packing density of the device.
However, it is difficult to etch the cobalt silicide (CoSi2) and thus it is difficult to pattern it. For this reason, the cobalt silicide (CoSi2) is difficult to be applied to the policide.
A related art semiconductor device and method for fabricating the same will be described with the accompanying drawings.
FIGS. 1a to 1f are sectional views showing fabricating process steps of the related art semiconductor device.
In a structure of the related art semiconductor device, as shown in FIG. 1f, a gate electrode 13a is formed on a part of a semiconductor substrate 11 and a gate oxide film 12 is interposed between the gate electrode 13a and the semiconductor substrate 11. An insulating spacer 14 is formed at both sides of the gate oxide film 12 and the gate electrode 13a. A cobalt silicide film 17 is formed on a surface of the gate electrode 13a at a predetermined depth.
A method for fabricating the aforementioned related art semiconductor device will be described below.
A device isolation region is formed by local oxidation of silicon (LOCOS) process or shallow trench isolation (STI) process to define an active region and an inactive region (not shown) in the semiconductor substrate 11.
As shown in FIG. 1a, the gate oxide film 12 is formed on the semiconductor substrate 11 of the active region, and a polysilicon film 13 for gate electrode on which impurity ions are doped is deposited on the gate oxide film 12.
Subsequently, as shown in FIG. 1b, the polysilicon film 13 and the gate oxide film 12 are selectively removed by photolithography and etching processes to form the gate electrode 13a on the gate oxide film 12.
A first nitride film is deposited along the surfaces of the semiconductor substrate 11 and the gate electrode 13a. Then, as shown in FIG. 1c, the first nitride film is selectively removed by anisotropic dry-etching process to remain on both sides of the gate electrode 13a and the gate oxide film 12, so that the insulating spacer 14 is formed.
As shown in FIG. 1d, a second nitride film 15 is deposited on an entire surface of the semiconductor substrate 11 including the gate electrode 13a. At this time, instead of the nitride films such as the first and second nitride films, oxide films may be used.
As shown in FIG. 1e, the second nitride film 15 is polished by chemical mechanical polishing (CMP) process to expose the surface of the gate electrode 13a. 
Subsequently, a cobalt film 16 is deposited on the entire surface of the semiconductor substrate 11 including the exposed gate electrode 13a. 
As shown in FIG. 1f, the cobalt silicide (CoSi2) film 17 is formed on the surface of the gate electrode 13a at a predetermined depth by annealing process. The cobalt silicide (CoSi2) film 17 is formed by reacting cobalt of the cobalt film 16 with silicon of the gate electrode 13a. 
Afterwards, the cobalt film 16 on the second nitride film 15, which remains without reacting with silicon, is removed using H2SO4 solution or HCl solution. The second nitride film 15 is then removed using the cobalt silicide film 17 as a mask to expose the semiconductor substrate 11 at both sides of the gate electrode 13a and the insulating spacer 14.
Finally, source/drain regions(not shown) are formed in the exposed semiconductor substrate 11 at both sides of the insulating spacer 14 at predetermined depths by impurity ion implantation using the cobalt silicide film 17 as a mask. Thus, the related art semiconductor device is completed.
However, the related art semiconductor device and method for fabricating the same has several problems.
In the CMP process for exposing the surface of the gate electrode, the surface of the gate electrode may not be exposed as the CMP process is not completely performed. In this case, the cobalt silicide is not formed. On the other hand, if the CMP process is performed exceedingly, poor lower pattern may be caused.
Furthermore, in the etching process of the polysilicon film to pattern the gate electrode, a photolithography process margin is very small. This is likely to cause a poor gate electrode pattern.
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the present invention is to provide a semiconductor device and method for fabricating the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
Another object of the present invention is to provide a semiconductor device and method for fabricating the same which improves reliability of the semiconductor device.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve at least these objects and other advantages in a whole or in part and in accordance with purposes of the present invention, as embodied and broadly described, a semiconductor device according to the present invention includes: a first insulating film and a gate electrode sequentially formed on a part of a semiconductor substrate; a first insulating spacer formed at both sides above the gate electrode; a second insulating spacer formed at both sides below the gate electrode; and a cobalt silicide film formed on a surface of the gate electrode at a predetermined depth.
In another aspect, a method for fabricating a semiconductor device according to the present invention includes the steps of: forming a first insulating film having a hole to expose a part of a semiconductor substrate; forming a second insulating film on the exposed semiconductor substrate inside the hole; forming a gate electrode on the second insulating film to protrude more than the first insulating film; forming a first insulating spacer at both sides of an upper part of the protruded gate electrode; forming a cobalt silicide on a surface of the upper part of the gate electrode; and selectively removing the first insulating film to remain on both sides of a lower part of the gate electrode, so that a second insulating spacer is formed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.